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  general description the max9760 evaluation system (ev system) consists of a max9760 evaluation kit (ev kit) and a companion maxim system management bus (smbus) interface board. the max9760 ev kit is also capable of evaluat- ing the max9761/max9762/max9763. the max9760 ev kit is a fully assembled and tested surface-mount circuit board that evaluates the max9760 3w stereo audio power amplifier plus head- phone driver. the ev kit is designed to be driven by any stereo audio source such as a cd player. the ev kit includes rca jacks on the inputs, a 3.5mm head- phone jack, and terminal blocks on the outputs to facili- tate easy connections to the circuit board. the ev kit includes windows 98/2000/xp-compatible software, which provides a user interface for exercising the max9760? features. the maxim smbus interface board (maxsmbus) allows an ibm-compatible pc to use its parallel port to emulate an smbus/i 2 c 2-wire interface. windows 98/2000/xp- compatible software provides a user-friendly interface to exercise the max9760 features. the program is menu driven and offers a graphical user interface (gui) with control buttons and a status display. the max9760evsys includes both the ev kit and the maxsmbus interface board. order the max9760evkit if you already have an smbus interface. the max9761 ev kit functions as a stand-alone unit, the maxsmbus interface is not required. features 4.5v to 5.5v single-supply operation 3w stereo bridge-tied-load (btl) amplifier 100db power-supply rejection ratio smbus/i 2 c-compatible 2-wire serial interface 2:1 stereo input mux selectable bass-boost circuitry no detectable clicks or pops easy-to-use, menu-driven software assembled and tested software-controlled mute, shutdown, input selection, and gain automatic headphone-sensing circuitry includes windows 98/2000/xp-compatible software and demo pc board evaluates the max9760?ax9763 evaluates: max9760?ax9763 max9760/max9761 evaluation system/evaluation kit ________________________________________________________________ maxim integrated products 1 19-2833; rev 1; 9/03 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. ordering information part temp range ic package smbus interface type max9760evkit 0 c to +70 c 28 qfn not included max9760evsys 0 c to +70 c 28 qfn maxsmbus max9761evkit 0 c to +70 c 28 qfn not required smbus is a trademark of intel corp. windows is a registered trademark of microsoft corp. i 2 c is a trademark of philips corp. purchase of i 2 c compo- nents of maxim integrated products, inc., or one of its subli- censed associated companies, conveys a license under the philips i 2 c patent rights to use these components in an i 2 c system, provided that the system conforms to the i 2 c standard specification as defined by philips. note: to evaluate the max9762, or max9763, request a max9762eti or max9763eti free sample with the max9760evkit. to evaluate the max9761, order the max9761evkit. the max9760 ev kit software is provided with the max9760evkit; however, the maxsmbus board is required to interface the ev kit to the computer when using the included software. single supply 4.5v to 5.5v input l1 input l2 input r1 input r2 hps i 2 c compatible se/ btl left right smbus/i 2 c- compatible interface figure 1. max9760/61 ev kit block diagram block diagram
evaluates: max9760?ax9763 quick start recommended equipment computer running windows 98, 2000, or xp parallel printer port (this is a 25-pin socket on the back of the computer) standard 25-pin, straight-through , male-to-female cable (printer extension cable) to connect the comput- er s parallel port to the maxim smbus interface board 9v/100ma dc power supply (for the smbus card) 5v/4a dc power supply one pair of headphones (16 ? or greater) two stereo audio sources (to demonstrate the input mux feature) one pair of speakers (3 ? or greater) procedure the max9760 ev kit is fully assembled and tested. follow the steps below to verify board operation. do not turn on the power supply until all connections are completed: 1) carefully connect the boards by aligning the 20-pin connector of the max9760 ev kit with the 20-pin header of the max smbus interface board. gently press them together. 2) ensure that a shunt is placed across pins 1 and 2 of jumpers ju1, ju4, and ju5. 3) ensure that jumpers ju2 and ju3 do not have a shunt placed on them. 4) ensure that a shunt is installed on jumper ju6. 5) connect a cable from the computer s parallel port to the smbus interface board. use a straight-through max9760/max9761 evaluation system/evaluation kit 2 _______________________________________________________________________________________ component list designation qty description c1 c4 4 0.68f 10%, 20v tantalum capacitors (r-case) avx tajr684k020 c5, c6, c16 3 100pf 5%, 50v c0g ceramic capacitors (0402) tdk c1005c0g1h101j c7, c8 2 0.047f 10%, 16v x7r ceramic capacitors (0402) tdk c1005x7r1c473k c9, c10, c11, c14, c15 5 220f 20%, 6.3v tantalum capacitors (c-case) avx tpsc227m006r0250 c12, c13 2 1.0f 20%, 10v x7r ceramic capacitors (0603) tdk c1608x7r1a105m r1 r6, r18 7 15.0k ? 1% resistors (0402) r7, r8 2 33.2k ? 1% resistors (0402) r9, r10 2 27.4k ? 1% resistors (0402) r11, r12, r15, r16 4 10k ? 5% resistors (0402) designation qty description r13, r14 2 1k ? 5% resistors (0402) r17 1 680k ? 5% resistor (0402) r19 1 47k ? 5% resistor (0402) j1, j3 2 phono jacks, white j2, j4 2 phono jacks, red j5 1 switched stereo headphone jack (3.5mm dia) j6 1 2 x 10 right-angle female receptacle ju1 1 jumper, dual row, 12-pin header ju2 ju5 4 3-pin headers ju6 1 2-pin header ju7 0 not installed (sip-3) tb1, tb2 2 2-circuit terminal blocks u1 1 max9760eti (28-pin qfn) none 6 shunts none 1 max9760 pc board none 1 software disk (cd-rom) max9760 evaluation kit component suppliers supplier phone fax website avx 843-946-0238 843-626-3123 www.avxcorp.com tdk 847-803-6100 847-390-4405 www.component.tdk.com note: please indicate that you are using the max9760 when contacting these component suppliers.
25-pin male-to-female cable. to avoid damaging the ev kit or your computer, do not use a 25-pin scsi port or any other connector that is physically similar to the 25-pin parallel printer port. 6) the max9760.exe software program can be run from the cd-rom or hard drive. use the windows program manager to run the program. if desired, you may use the install.exe program to copy the files and create icons in the windows 98/2000/xp start menu. do not turn on the power until all connections are made. 7) connect the 9v power supply to the pads labeled pos9 and gnd1 of the smbus interface board. 8) connect the 5.0v power supply to the pads labeled vdd and gnd on the max9760 ev kit board. 9) ensure that both stereo audio sources are turned off. 10) connect the first stereo audio source to the input jacks labeled j1 and j2. 11)connect the second stereo audio source to the input jacks labeled j3 and j4. 12) plug the headphones into the 3.5mm headphone jack labeled j5. 13) connect the speakers to the terminal blocks labeled tb1 and tb2. 14) turn on the dc power supplies. 15) enable the stereo audio sources. 16) start the max9760 program by opening its icon in the start menu. 17) normal device operation can be verified by the smbus status: dut board found text in the interface box. evaluates: max9760?ax9763 max9760/max9761 evaluation system/evaluation kit _______________________________________________________________________________________ 3 figure 2. max9760 ev kit software main window
evaluates: max9760?ax9763 detailed description of software user-interface panel the user interface (shown in figure 2) is easy to operate; use the mouse, or a combination of the tab and arrow keys to manipulate the software. each of the buttons corresponds to bits in the command and configuration bytes. by clicking on them, the correct smbus write operation is generated to update the internal registers of the max9760. the interface box indicates the current device address , the register address , and the data sent/received for the last read/write operation. this data is used to confirm proper device operation. note: words in boldface are user-selectable features in the software. signal input selection the max9760 ev kit can route one of two independent stereo signals to the speakers or headphones. the input signal is selected by choosing the desired option in the signal input selection box. choosing signal input #1 , routes the signal from input jacks j1 and j2. choosing signal input #2 , routes the signal from input jacks j3 and j4. max9760 status the program continually polls the device for new status data and monitors the alert conditions. to disable contin- uous polling of data, uncheck the automatic read checkbox. if an interrupt condition is generated by the headphones being inserted, the message interrupt appears. speaker/headphone control selecting the desired option in the speaker/headphone control box allows the max9760 ev kit to operate in one of three independent modes. the automatic mode (default) detects the insertion of the headphones in jack j5. the speaker outputs are disabled if the headphones are present, and enabled if the headphones are absent. selecting the speaker mode (btl) provides drive to the speakers and headphones (if both are present). selecting the headphone mode (single-ended) provides drive to the headphones only. software mute and shutdown control selecting the desired option in the mute and shutdown control box allows the max9760 ev kit to disable the left, right, or both output channels. checking the mute left option mutes the left channel. checking the mute right option mutes the right channel. checking the mute left+right option mutes both channels. checking the shutdown all audio circuitry places the max9760 into a low-power shutdown mode. output gain selection selecting the desired option in the output gain selection box allows the max9760 ev kit to amplify the chosen input signal using one of two different gains. selecting gain a (with bass-boost) amplifies the input signal using the feedback networks connected to the gainra and gainla pins of the max9760. selecting gain b (flat) amplifies the input signal using the feed- back networks connected to the gainrb and gainlb pins. when the device is in automatic mode, the output gain is dependent on the insertion of the headphones. refer to the max9760 max9763 data sheet for more details. simple smbus commands there are two methods for communicating with the max9760: through the normal user-interface panel or through the smbus commands available by selecting the 2-wire interface diagnostic item from the options pulldown menu. a display pops up that allows the smbus protocols, such as read byte and write byte, to be executed. to stop normal user-interface execution so that it does not override the manually set values, turn off the update timer by unchecking the automatic read checkbox. the smbus dialog boxes accept numeric data in binary, decimal, or hexadecimal. hexadecimal numbers should be prefixed by $ or 0x. binary numbers must be exactly eight digits. see figure 3 for an example of this tool. note: in places where the slave address asks for an 8-bit value, it must be the 7-bit slave address of the max9760 as determined by add with the last bit set to 1 for a read operation or a zero for a write. refer to the max9760 data sheet for a complete list of registers and functions. detailed description of hardware the max9760 ev kit is a stereo, single-supply speak- er/headphone amplifier. the ev kit is designed to be driven by any stereo audio source. the input impedance is 15k ? . the ev kit is shipped with components selected to produce a bass-boosted frequency response (6db, f c = 100hz) and a 0db flat- frequency response. the ev kit is powered with a 4.5v to 5.5v supply. a highpass filter is implemented on the max9760 ev kit. the lower 16hz, -3db corner frequen- cy is dependent on components r1, r4, and c1, c4, c9, and c10. multiple input and output jacks facilitate easy connec- tions to the board. connect the speakers to terminal blocks tb1 and tb2. connect the two stereo input sources through jacks j1, j2 and j3, j4. connect the headphones through jack j5. max9760/max9761 evaluation system/evaluation kit 4 _______________________________________________________________________________________
address selection jumper ju1 sets the max9760 slave address. the default address is 1001 001y (add = vdd). see table 1 for a complete list of addresses. note: the first 7 bits shown are the address. y (bit 0) is the smbus read/write bit. this bit is a 1 for a read oper- ation or a zero for a write. hardware shutdown control jumper ju5 controls the shutdown function of the max9760 ev kit. removing the shunt from ju5 allows the shutdown function to be controlled by an external signal source connected to the shdn pad. see table 2 for shutdown shunt positions. manual headphone sense control to simulate a pair of headphones being inserted into the headphone jack j5, remove the shunt from jumper ju6. connect the load to the left, right, and gnd pads located by headphone jack j5 (see table 3 for jumper settings). bass-boost the max9760 ev kit includes circuitry to increase the low-frequency (bass) response. to alter the bass response (see figure 4), follow the steps below: 1) choose appropriate gains a 1 and a 2 . 2) choose the center frequency f c . evaluates: max9760?ax9763 max9760/max9761 evaluation system/evaluation kit _______________________________________________________________________________________ 5 figure 3. the above example shows a simple smbuswritebyte operation using the included 2-wire interface diagnostics. in this example, the software is writing data (0x18) to device address 0x92, register address 0x01. the above data sequence mutes both output channels of the max9760. table 1. shunt settings for smbus address max9760 address jumper shunt position max9760 address pin binary hexadecimal 1 2* v dd 1001 001y 0x92 3 4 sda 1001 010y 0x94 5 6 sgnd 1001 000y 0x90 7 8 scl 1001 011y 0x96 9 10 ju1 11 12 not used for the max9760 or the max9762 (see the gain selection table for more details). * default configuration.
evaluates: max9760?ax9763 3) calculate and install components r 7 r 10 , c 7 , and c 8 using equations 1, 2, and 3. where: a 1 = bass-boosted gain (db) a 2 = nonbass-boosted gain (db) f c = center frequency (hz). evaluating the max9761 max9761 shutdown control jumper ju5 controls the shutdown function of the max9761. removing the shunt from ju5 allows the shutdown function to be controlled by an external sig- nal source connected to the shdn pad. see table 4 for shutdown shunt positions. max9761 gain selection jumper ju1 controls the gain selection of the max9761. the gain selection function can be set to select gain a or gain b. alternatively, the gain selection can be controlled by an external signal source through the gain a /b pad. gain selection can also be con- trolled by the headphone sense pin, which enables automatic gain selection. see table 5 for gain selection shunt positions. max9761 headphone sense enable jumper ju4 controls the hps_en pin of the max9761. alternatively, the shunt can be removed from ju4 and the hps_en pin can be driven by an external signal source connected to the hps_en pad. the hps_en pin in conjunction with the hps pin determines the out- put mode of the max9761. refer to the max9760 max9763 data sheet for more details. see table 6 for headphone sense enable shunt positions. max9761 mute control jumper ju3 controls the mute function of the max9761. alternatively, the shunt can be removed from ju3 allowing the mute function to be driven by an external signal source connected to the mute pad. see table 7 for mute shunt positions. cc fr r c 78 79 1 2 == rr rk rk a a 910 7 7 10 15 10 15 1 20 1 20 == ? ? ? ? ? ? ? ? ? ? ? rr k a 78 10 15 1 20 == ? max9760/max9761 evaluation system/evaluation kit 6 _______________________________________________________________________________________ table 2. max9760 shutdown selection jumper shunt position description 1 2* max9760 enabled ju5 2 3 max9760 shut down table 3. max9760 manual headphone sense control jumper shunt position description installed* max9760 ev kit headphone sense controlled by the insertion of headphones ju6 not installed max9760 ev kit headphone sense switch forced open table 4. max9761 shutdown selection jumper shunt position description 1 2* max9761 enabled 2 3 max9761 shutdown ju5 not installed shdn function controlled by an external signal source a 1 f c frequency (hz) output magnitude (db) a 1 + a 2 2 a 2 figure 4. the bass-boost components create an output magnitude response similar to the diagram shown above (eq1) (eq2) (eq3) * default configuration. * default configuration. * default configuration.
max9761 input selection jumper ju2 controls the input selection function of the max9761. alternatively, the shunt can be removed from ju2 allowing the input selection function to be driven by an external signal source connected to the in 1 /2 pad. see table 8 for input selection shunt positions. evaluating the max9762 and max9763 the max9760 ev kit is also capable of evaluating the smbus/i 2 c-compatible max9762 and the parallel-drive max9763. to evaluate the max9762 or max9763 mono speaker/headphone driver, follow the directions given below. when evaluating the max9763, ensure that the max9760 ev kit is not connected to the maxsmbus board, as undesirable device operation may occur. hardware setup the max9760 ev kit must be modified to evaluate the max9762 or max9763 mono speaker/headphone driver: 1) replace the max9760 with max9762 or max9763. 2) cut the trace between pins 2 and 3 of jumper ju7. 3) install a 3-pin header into the location designated by ju7. 4) install a shunt on pins 1 2 of jumper ju7. the mono speaker output is accessed through the ter- minal block designated tb2. software control and gain selection the max9762 can be controlled with the provided max9760 ev kit software. unlike the max9760, the max9762 and max9763 have an additional gain for the mono speaker. the feedback network that controls the mono gain is composed of components r18 and c16. if the output is forced into speaker mode (btl), the mono gain is selected regardless of the a/b gain. if the output is forced into headphone mode (single ended), the output gain is either a or b. refer to the max9760 max9763 data sheet for more details. evaluates: max9760?ax9763 max9760/max9761 evaluation system/evaluation kit _______________________________________________________________________________________ 7 table 5. max9761 gain selection jumper shunt position max9761 gain a /b pin description 1 2* vdd gain b selected 3 4 sda not valid 5 6 dgnd gain a selected 7 8 scl not valid 9 10 gain a /b pad gain selection controlled by an external signal source ju1 11 12 hps pin of max9761 automatic gain selection mode table 6. max9761 headphone sense enable selection jumper shunt position description 1 2* hps_en pin tied high 2 3 hps_en pin tied low ju4 not installed hps_en pin controlled by an external signal source table 7. max9761 mute control jumper shunt position description 1 2 output disabled 2 3* output enabled ju3 not installed mute function controlled by an external signal source table 8. max9761 input selection jumper shunt position description 1 2 input 2 selected 2 3* input 1 selected ju2 not installed input selection controlled by an external signal source * default configuration. * default configuration. * default configuration. * default configuration.
evaluates: max9760?ax9763 max9760/max9761 evaluation system/evaluation kit 8 _______________________________________________________________________________________ j6-2 j6-4 j6-5 j6-6 j6-8 j6-10 j6-12 j6-14 j6-16 j6-3 j6-7 j6-9 j6-11 j6-13 j6-15 j6-17 j6-20 j6-1 j6-18 j6-19 header 20 pin sda scl int dgnd j6 j4 1 2 r4 15k ? 1% c4 0.68 f 20v sgnd j3 1 2 r3 15k ? 1% c3 0.68 f 20v sgnd j2 1 2 r2 15k ? 1% c2 0.68 f 20v sgnd j1 1 2 r1 15k ? 1% c1 0.68 f 20v sgnd 20 6 19 5 inr2 inl2 inr1 inl1 ju1-2 ju1-3 ju1-6 ju1-7 ju1-10 ju1-11 ju1-1 ju1-4 sda ju1-5 ju1-8 scl ju1-9 gaina/b ju1-12 hps header 12 pin ju1 dgnd vdd 15 add 4 sv dd 17 bias r16 10k ? 1 2 3 ju5 dgnd shdn 14 shdn r15 10k ? 1 2 3 ju4 dgnd int 2 int r14 1k ? 1 2 3 ju3 dgnd sda 1 sda r13 1k ? 1 2 3 ju2 dgnd scl 28 scl 1 2 3 ju7 sgnd r18 15k ? 1% r10 27.4k ? 1% r6 15k ? 1% c16 100pf c8 0.047 f c6 100pf r8 33.2k ? 1% tb2-2 tb2-1 terminal block tb2 right c10 220 f 6.3v r12 10k ? rpgnd r9 27.4k ? 1% r19 47k ? r5 15k ? 1% c7 0.047 f c5 100pf r7 33.2k ? 1% tb1-2 tb1-1 terminal block tb1 left c9 220 f 6.3v r11 10k ? lpgnd sgnd gnd j5 right left 4 3 2 1 ju6 vdd hps gnd gainra gainrb outr+ outr- hps gainla gainlb outl+ outl- 18 21 22 24 26 16 7 8 10 12 c11 220 f 6.3v c12 1 f sgnd dgnd pgnd pgnd pgnd pgnd lpgnd rpgnd 13 9 23 27 vdd vdd vdd vdd vdd c14 220 f 6.3v rpgnd c15 220 f 6.3v lpgnd pv dd pv dd v dd 11 25 3 sgnd c13 1 f u1 vdd gnd mute sda in1/2 scl gaina/b hps_en int hps hps shdn shdn vdd rpgnd lpgnd dgnd sgnd gaina/b max9760 r17 680k ? figure 5. max9760 ev kit schematic
evaluates: max9760?ax9763 max9760/max9761 evaluation system/evaluation kit _______________________________________________________________________________________ 9 figure 7. max9760 ev kit pc board layout?omponent side figure 6. max9760 ev kit component placement guide?omponent side
evaluates: max9760?ax9763 max9760/max9761 evaluation system/evaluation kit 10 ______________________________________________________________________________________ figure 9. max9760 ev kit pc board layout?nner layer 3 figure 8. max9760 ev kit pc board layout?nner layer 2
evaluates: max9760?ax9763 max9760/max9761 evaluation system/evaluation kit ______________________________________________________________________________________ 11 figure 10. max9760 ev kit pc board layout?older side
evaluates: max9760?ax9763 max9760/max9761 evaluation system/evaluation kit 12 ______________________________________________________________________________________ j6-2 j6-4 j6-5 j6-6 j6-8 j6-10 j6-12 j6-14 j6-16 j6-3 j6-7 j6-9 j6-11 j6-13 j6-15 j6-17 j6-20 j6-1 j6-18 j6-19 header 20 pin sda scl int dgnd j6 j4 1 2 r4 15k ? 1% c4 0.68 f 20v sgnd j3 1 2 r3 15k ? 1% c3 0.68 f 20v sgnd j2 1 2 r2 15k ? 1% c2 0.68 f 20v sgnd j1 1 2 r1 15k ? 1% c1 0.68 f 20v sgnd 20 6 19 5 inr2 inl2 inr1 inl1 ju1-2 ju1-3 ju1-6 ju1-7 ju1-10 ju1-11 ju1-1 ju1-4 sda ju1-5 ju1-8 scl ju1-9 gaina/b ju1-12 hps header 12 pin ju1 dgnd vdd 15 4 sv dd 17 bias r16 10k ? 1 2 3 ju5 dgnd shdn 14 shdn r15 10k ? 1 2 3 ju4 dgnd int 2 hps_en r14 1k ? 1 2 3 ju3 dgnd sda 1 mute r13 1k ? 1 2 3 ju2 dgnd scl 28 1 2 3 ju7 sgnd r18 15k ? 1% r10 27.4k ? 1% r6 15k ? 1% c16 100pf c8 0.047 f c6 100pf r8 33.2k ? 1% tb2-2 tb2-1 terminal block tb2 right c10 220 f 6.3v r12 10k ? rpgnd r9 27.4k ? 1% r19 47k ? r5 15k ? 1% c7 0.047 f c5 100pf r7 33.2k ? 1% tb1-2 tb1-1 terminal block tb1 left c9 220 f 6.3v r11 10k ? lpgnd sgnd gnd j5 right left 4 3 2 1 ju6 vdd hps gnd gainra gainrb outr+ outr- hps gainla gainlb outl+ outl- 18 21 22 24 26 16 7 8 10 12 c11 220 f 6.3v c12 1 f sgnd dgnd pgnd pgnd pgnd pgnd lpgnd rpgnd 13 9 23 27 vdd vdd vdd vdd vdd c14 220 f 6.3v rpgnd c15 220 f 6.3v lpgnd pv dd pv dd v dd 11 25 3 sgnd c13 1 f u1 vdd gnd mute sda in1/2 scl gaina/b hps_en int hps hps shdn shdn vdd rpgnd lpgnd dgnd sgnd gaina/b max9761 in1/2 gaina/b r17 680k ? figure 11. max9761 ev kit schematic
evaluates: max9760?ax9763 max9760/max9761 evaluation system/evaluation kit ______________________________________________________________________________________ 13 j6-2 j6-4 j6-5 j6-6 j6-8 j6-10 j6-12 j6-14 j6-16 j6-3 j6-7 j6-9 j6-11 j6-13 j6-15 j6-17 j6-20 j6-1 j6-18 j6-19 header 20 pin sda scl int dgnd j6 j4 1 2 r4 15k ? 1% c4 0.68 f 20v sgnd j3 1 2 r3 15k ? 1% c3 0.68 f 20v sgnd j2 1 2 r2 15k ? 1% c2 0.68 f 20v sgnd j1 1 2 r1 15k ? 1% c1 0.68 f 20v sgnd 20 6 19 5 inr2 inl2 inr1 inl1 ju1-2 ju1-3 ju1-6 ju1-7 ju1-10 ju1-11 ju1-1 ju1-4 sda ju1-5 ju1-8 scl ju1-9 gaina/b ju1-12 hps header 12 pin ju1 dgnd vdd 15 add 4 sv dd 17 bias r16 10k ? 1 2 3 ju5 dgnd shdn 14 shdn r15 10k ? 1 2 3 ju4 dgnd int 2 int r14 1k ? 1 2 3 ju3 dgnd sda 1 sda r13 1k ? 1 2 3 ju2 dgnd scl 28 scl 1 2 3 ju7 sgnd r18 15k ? 1% r10 27.4k ? 1% r6 15k ? 1% c16 100pf c8 0.047 f c6 100pf r8 33.2k ? 1% tb2-2 tb2-1 terminal block tb2 mono c10 220 f 6.3v r12 10k ? rpgnd r9 27.4k ? 1% r19 47k ? r5 15k ? 1% c7 0.047 f c5 100pf r7 33.2k ? 1% tb1-2 tb1-1 terminal block tb1 n.c. c9 220 f 6.3v r11 10k ? lpgnd sgnd gnd j5 right left 4 3 2 1 ju6 vdd hps gainm gainra gainrb outr+ outr- hps gainla gainlb outl+ n.c. 18 21 22 24 26 16 7 8 10 12 c11 220 f 6.3v c12 1 f sgnd dgnd gnd pgnd pgnd pgnd lpgnd rpgnd 13 9 23 27 vdd vdd vdd vdd vdd c14 220 f 6.3v rpgnd c15 220 f 6.3v lpgnd pv dd pv dd v dd 11 25 3 sgnd c13 1 f u1 vdd gnd mute sda in1/2 scl gaina/b hps_en int hps hps shdn shdn vdd rpgnd lpgnd dgnd sgnd gaina/b max9762 r17 680k ? figure 12. max9760 ev kit schematic ( modified for max9762 )
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 14 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2003 maxim integrated products printed usa is a registered trademark of maxim integrated products. evaluates: max9760?ax9763 max9760/max9761 evaluation system/evaluation kit j6-2 j6-4 j6-5 j6-6 j6-8 j6-10 j6-12 j6-14 j6-16 j6-3 j6-7 j6-9 j6-11 j6-13 j6-15 j6-17 j6-20 j6-1 j6-18 j6-19 header 20 pin sda scl int dgnd j6 j4 1 2 r4 15k ? 1% c4 0.68 f 20v sgnd j3 1 2 r3 15k ? 1% c3 0.68 f 20v sgnd j2 1 2 r2 15k ? 1% c2 0.68 f 20v sgnd j1 1 2 r1 15k ? 1% c1 0.68 f 20v sgnd 20 6 19 5 inr2 inl2 inr1 inl1 ju1-2 ju1-3 ju1-6 ju1-7 ju1-10 ju1-11 ju1-1 ju1-4 sda ju1-5 ju1-8 scl ju1-9 gaina/b ju1-12 hps header 12 pin ju1 dgnd vdd 15 4 sv dd 17 bias r16 10k ? 1 2 3 ju5 dgnd shdn 14 shdn r15 10k ? 1 2 3 ju4 dgnd int 2 hps_en r14 1k ? 1 2 3 ju3 dgnd sda 1 mute r13 1k ? 1 2 3 ju2 dgnd scl 28 1 2 3 ju7 sgnd r18 15k ? 1% r10 27.4k ? 1% r6 15k ? 1% c16 100pf c8 0.047 f c6 100pf r8 33.2k ? 1% tb2-2 tb2-1 terminal block tb2 mono c10 220 f 6.3v r12 10k ? rpgnd r9 27.4k ? 1% r19 47k ? r5 15k ? 1% c7 0.047 f c5 100pf r7 33.2k ? 1% tb1-2 tb1-1 terminal block tb1 n.c. c9 220 f 6.3v r11 10k ? lpgnd sgnd gnd j5 right left 4 3 2 1 ju6 vdd hps gainm gainra gainrb outr+ outr- hps gainla gainlb outl+ n.c. 18 21 22 24 26 16 7 8 10 12 c11 220 f 6.3v c12 1 f sgnd dgnd gnd pgnd pgnd pgnd lpgnd rpgnd 13 9 23 27 vdd vdd vdd vdd vdd c14 220 f 6.3v rpgnd c15 220 f 6.3v lpgnd pv dd pv dd v dd 11 25 3 sgnd c13 1 f u1 vdd gnd mute sda in1/2 scl gaina/b hps_en int hps hps shdn shdn vdd rpgnd lpgnd dgnd sgnd gaina/b max9763 in1/2 gaina/b r17 680k ? figure 13. max9760 ev kit schematic ( modified for max9763 )


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